目　　錄

Session 1　Introduction to Semiconductor 1
1.1　What Is Semiconductor 1
1.2　Classification of Semiconductor 3
Reading Materials 3
Session 2　Crystal Structure 9
2.1　Primitive Cell and Crystal Plane 9
2.2　Atomic Bonding 11
Reading Materials 12
Session 3　Band Model 17
3.1　Introduction to Quantum Mechanics 17
3.1.1　The Principle of Energy Quanta 17
3.1.2　Schrodinger’s Wave Equation 18
3.2　Band 18
3.3　Effective Mass Theory 19
Reading Materials 20
Session 4　The Semiconductor in
Equilibrium 23
4.1　Charge Carriers in Semiconductor 23
4.2　Intrinsic Semiconductor 25
4.3　Extrinsic Semiconductor 26
Reading Materials 28
Session 5　Carrier Transport 32
5.1　Overview of Carrier Transport 32
5.2　Low Field Transport 33
5.2.1　Mobility 33
5.2.2　Microscopic Scattering Processes 34
5.3　High Field Transport 35
5.4　Diffusion Current 36
Reading Materials 38
Session 6　Nonequilibrium Excess Carriers
in Semiconductor 42
6.1　Recombination 42
6.1.1　Band to Band Recombination 42
6.1.2　Free-Exciton Recombination 43
6.1.3　Auger Recombination 43
6.1.4　Band-Impurity Recombination 43
6.1.5　Surface Recombination 44
6.2　Minority Carrier Lifetime 44
6.3　Ambipolar Transport 45
Reading Materials 46
Session 7　The pn Junction (Ⅰ) 49
7.1　Introduction 49
7.2　Basic Structure of the pn Junction 49
7.3　Energy Band Diagram for a pn
Junction 50
7.4　Ideal Current-Voltage Relationship 51
7.5　Characteristics of a Practical Diode 51
Reading Materials 52
Session 8　The pn Junction(Ⅱ) 57
8.1　Breakdown in pn Junction 57
8.2　Small-Signal Diffusion Resistance
of the pn Junction 57
8.3　Junction Capacitance 58
8.4　Diffusion or Storage Capacitance 59
8.5　Diode Transients 60
8.6　Circuit Models for Junction Diodes 60
Reading Materials 61
Session 9　Metal-Semiconductor
Contacts 65
9.1　Schottky Contacts 65
9.1.1　Schottky Contacts in Equilibrium 66
9.1.2　Schottky Contacts under Applied
Bias 68
9.2　Ohmic Contacts 70
Reading Materials 72

Session 10　Heterojunctions 75
10.1　Strain and Stress at Heterointerfaces 75
10.2　Heterojunction Materials 76
10.3　Energy-Band Diagram 78
Reading Materials 79
Session 11　The Bipolar Junction
Transistor (Ⅰ) 82
11.1　The Bipolar Junction Transistor Construction 82
11.2　Transistor Action 82
11.3　Nonideal Effects 83
11.4　Base Resistance 85
Reading Materials 86
Session 12　The Bipolar Junction
Transistor (Ⅱ) 90
12.1　Breakdown Voltage 90
12.2　Frequency Limits of BJT 91
12.3　The Schottky-Clamped Transistor 92
12.4　Small-Signal Transistor Model 93
Reading Materials 94
Session 13 Modern BJT Structures 97
13.1 Introduction 97
13.2 Deep-Trench Isolation 97
13.3 Polysilicon Emitter 98
13.4 Self-Aligned Polysilicon Base
Contact 98
13.5 Pedestal Collector 98
13.6 SiGe-Base 99
Reading Materials 99
Session 14　Basics of MOSFETs 104
14.1　Introduction 104
14.2　General Characteristics of a
MOSFET 104
14.3　MOS System 105
14.4　Work Function Differences 106
14.5　Flat-Band Voltage 106
14.6　Threshold Voltage 107
Reading Materials 107

Session 15　Nonideal Effects of
MOSFETs 111
15.1　Introduction 111
15.2　Effective Mobility 111
15.3　Velocity Saturation 111
15.4　Channel-Length Modulation 112
15.5　DIBL 112
15.6　Hot-Carrier Effect 113
15.7　GIDL 114
Reading Materials 114
Session 16　Advanced MOSFET
Devices 118
16.1　Introduction 118
16.2　Channel Doping Profile 118
16.3　Gate Stack 118
16.4　Source/Drain Design 119
16.5　Schottky-Barrier Source/Drain 120
16.6　Raised Source/Drain 120
16.7　SOI 121
16.8　Three Dimensional Structure 121
Reading Materials 122
Session 17　Introduction to Integrated
Circuits 127
17.1　Introduction 127
17.2　Size and Complexity of Integrated Circuits 128
17.3　Semiconductor Device for Integrated Circuits 129
17.4　IC Design Process 131
Reading Materials 132
Session 18　Analog Integrated Circuits
Design 138
18.1　Introduction 138
18.2　Analog Signal Processing 140
18.3　CMOS Technology 141
18.4　Amplifiers 141
18.5　Differential Amplifiers 142
18.6　Operational Amplifiers 143
18.7　Characterization of Op Amps 144
Reading Materials 145
Session 19　Digital Integrated Circuits
Design 149
19.1　Introduction 149
19.2　The Static CMOS Inverter 149
19.2.1　Switching Threshold 150
19.2.2　Noise Margins 150
19.2.3　Performance of CMOS Inverter:
The Dynamic Behavior 151
19.3　Designing Combinational Logic
Gates in CMOS 153
19.3.1　Static CMOS Design 153
19.3.2　Dynamic CMOS Design 156
Reading Materials 157
Session 20 Semiconductor Memories 162
20.1 Introduction 162
20.2 SRAM 163
20.3 DRAM 164
20.4 Flash Memories 165
Reading Materials 167
Session 21　Radio Frequency Integrated Circuits Design 172
21.1　Introduction 172
21.2　RF System Performance Metrics 173
21.3　RF Transceiver Architectures 174
21.4　RF Passive Component 174
21.5　Low-Noise Amplifier 175
21.6　Frequency Synthesizer 176
21.7　Transmitter 177
21.7.1　Up conversion versus Downconversion 177
21.7.2　Mixer 178
21.7.3　RF PA (Power Amplifier) 178
Reading Materials 179
Session 22　Simulation and Verification 186
22.1　Introduction 186
22.2　SPICE Circuit Simulator 186
22.2.1　SPICE Models 186
22.2.2　Circuit Simulation 188
22.3　Circuit Design Automation with
Verilog 189
22.3.1　Digital Design Flow 189
22.3.2　Verilog HDL 190
22.4　Verification 191
Reading Materials 192
Session 23　Introduction to the Semiconductor
Technology (Ⅰ) 196
23.1　The Development of Semiconductor Technology 196
23.2　Wafer Fabrication 197
23.2.1　Wafer Preparation 197
23.2.2　Oxidation 198
23.2.3　Diffusion 199
23.2.4　Ion Implantation 199
23.2.5　Chemical-Vapor Deposition 199
23.2.6　Metallization 200
23.2.7　Photolithography 200
23.2.8　Etching 201
Reading Materials 202
Session 24　Introduction to the Semiconductor Technology (Ⅱ) 205
24.1　Assembly 205
24.2　Metrology 207
Reading Materials 209
Session 25　Bipolar Technology and GaAs Digital Logic Process 212
25.1　Bipolar Technology 212
25.1.1　pn Junction Isolated Bipolar IC Technology 212
25.1.2　Dielectrically Isolated Bipolar Technologies 216
25.2　GaAs Digital Logic Process 217
Reading Materials 219
Session 26　CMOS Technology 224
26.1　CMOS Fabrication Sequence 224
26.2　Twin Well and Retrograde Well 226
26.3　Isolation 227
26.4　Structures that Reduce the
Drain Field 227
26.5　Gate Engineering 228
Reading Materials 229
Session 27　Reliability 235
27.1　Introduction 235
27.2　Failure Modes 237
Reading Materials 241
�▍� 考 譯 文
第1講　半導體概述 245
1.1　什么是半導體 245
1.2　半導體的分類 246
第2講　晶體結構 247
2.1　原胞和晶面 247
2.2　原子價鍵 249
第3講　能帶模型 250
3.1　量子力學簡介 250
3.2　能帶 251
3.3　有效質量理論 251
第4講　平衡半導體 252
4.1　半導體中的帶電載流子 252
4.2　本征半導體 254
4.3　非本征半導體 255
第5講　載流子輸運 256
5.1　載流子輸運概要 256
5.2　低場輸運 258
5.3　強場輸運 260
5.4　擴散電流 260
第6講　半導體中的非平衡過剩載流子 261
6.1　復合 262
6.2　少數(shù)載流子壽命 264
6.3　雙極輸運 264
第7講　pn結（Ⅰ） 265
7.1　概述 265
7.2　pn結的基本結構 265
7.3　pn結的能帶圖 266
7.4　理想電流-電壓關系 267
7.5　實際二極管特性 267
第8講　pn結（Ⅱ） 268
8.1　pn結擊穿 268
8.2　pn結的小信號擴散電阻 269
8.3　結電容 269
8.4　擴散電容（存儲電容） 270
8.5　二極管瞬態(tài)特性 271
8.6　pn結二極管的電路模型 271
第9講　金屬-半導體接觸 272
9.1　肖特基接觸 272
9.2　歐姆接觸 276
第10講　異質結 277
10.1　異質界面的應變與應力 277
10.2　異質結材料 278
10.3　能帶圖 280
第11講　雙極晶體管（Ⅰ） 281
11.1　雙極晶體管結構 281
11.2　晶體管作用 281
11.3　非理想效應 282
11.4　基區(qū)電阻 284
第12講　雙極晶體管（Ⅱ） 285
12.1　擊穿電壓 285
12.2　雙極晶體管的頻率特性 286
12.3　肖特基鉗位晶體管 286
12.4　晶體管的小信號模型 287
第13講 現(xiàn)代雙極晶體管結構 288
13.1 引言 288
13.2 深槽隔離 288
13.3 多晶硅發(fā)射極 289
13.4 自對準多晶硅基極接觸 289
13.5 臺狀摻雜集電區(qū) 289
13.6 SiGe基區(qū) 290
第14講　MOSFET基礎 290
14.1　引言 290
14.2　MOSFET的一般特征 291
14.3　MOS系統(tǒng) 291
14.4　功函數(shù)差 292
14.5　平帶電壓 292
14.6　閾值電壓 293
第15講　MOSFET的非理想效應 293
15.1　引言 293
15.2　有效遷移率 293
15.3　速度飽和 294
15.4　溝道調制效應 294
15.5　漏致勢壘降低 295
15.6　熱電子效應 295
15.7　柵致漏極泄漏電流 296

第16講　先進的MOSFET器件 296
16.1　引言 296
16.2　溝道摻雜分布 296
16.3　柵疊層 297
16.4　源/漏設計 297
16.5　肖特基源/漏 298
16.6　提升的源/漏 298
16.7　SOI（絕緣層上的硅） 299
16.8　三維結構 299
第17講　集成電路簡介 300
17.1　概述 300
17.2　集成電路的面積和復雜度 301
17.3　集成電路中的半導體器件 302
17.4　集成電路設計過程 303
第18講　模擬集成電路設計 304
18.1　概述 304
18.2　模擬信號處理 306
18.3　CMOS工藝 307
18.4　放大器 307
18.5　差分放大器 308
18.6　運算放大器 309
18.7　運放的特點 309
第19講　數(shù)字集成電路設計 310
19.1　介紹 310
19.2　靜態(tài)CMOS反相器 310
19.3　CMOS組合邏輯門的設計 313
第20講 半導體存儲器 317
20.1 簡介 317
20.2 靜態(tài)隨機存取存儲器
（SRAM） 318
20.3 動態(tài)隨機存取存儲器
（DRAM） 319
20.4 閃存 320
第21講　射頻集成電路設計 322
21.1　概述 322